Collaborative Research: FET: Medium:Compact and Energy-Efficient Compute-in-Memory Accelerator for Deep Learning Leveraging Ferroelectric Vertical NAND Memory

The field of artificial intelligence (AI) has recently made significant strides, with notable advancements such as large language models like ChatGPT taking the world by storm. However, these breakthroughs would not have been possible without the availability of powerful computing hardware, such as graphics processing units (GPUs). Such hardware has benefited from several decades of technology scaling following Moore's law. As technology approaches its physical limits and AI models require exponentially increasing hardware resources, including computation and storage, alternative computing paradigms with superior energy efficiency and performance are necessary for a sustainable future. Compute-in-memory is one promising approach where computations are directly performed in memory units, eliminating most data movements, a key bottleneck in conventional computers. However, to best exploit the compute-in-memory for acceleration of AI models on the scale of giga-byte to tera-byte levels, it is critical to have high capacity, energy-efficient, and high performance memory technology to fit the models. NAND memory is a form of erasable programmable read-only memory that takes its name from the not-and (NAND) logic gate. The proposed research aims to develop ferroelectric vertical NAND memory to meet these demands and at the same time train students for developing a future workforce for the semiconductor industry.Vertical NAND memory offers the highest density by increasing the number of stacked layers vertically. However, conventional vertical NAND memory based on floating gate or charge trap flash suffers from poor performance, including high write voltage, low speed, and poor endurance, despite their large capacity. To address these issues, this research proposes the development of a vertical NAND flash alternative: the vertical NAND ferroelectric field-effect transistor (FeFET), which achieves high density and high performance simultaneously. By leveraging the recently discovered ferroelectric HfO2, superior performance can be achieved as ferroelectric programming is driven by an applied electric field, which can be energy-efficient and fast. The project aims to design and evaluate vertical NAND FeFET-based compute-in-memory accelerators from devices to architectures, with innovations such as novel cell designs to achieve multi-level cell and variation suppression, vertical NAND array disturb mitigation with a novel array structure, and mapping and benchmarking of various important information processing tasks to the vertical NAND FeFET array. Additionally, this research includes workforce training activities such as lectures and hands-on experience offered to K-12 students and teachers to promote excitement and attract them to the talent pipeline for the semiconductor industry. The proposed research will recruit graduate and undergraduate students via the Research Experience for Undergraduates (REU) program from underrepresented groups, and the knowledge acquired in this project will be distributed through curriculum development and online sharing repositories.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

人工智能领域（AI）最近取得了长足的进步，诸如Chatgpt之类的大型语言模型等显着进步席卷了世界。但是，如果没有强大的计算硬件，例如图形处理单元（GPU），这些突破将是不可能的。这种硬件受益于摩尔定律的数十年技术扩展。随着技术接近其物理限制，AI模型需要指数级增加硬件资源，包括计算和存储，对于可持续的未来，具有较高能源效率和性能的替代计算范式是必不可少的。计算中的内存是一种有前途的方法，其中直接在存储单元中执行计算，消除了大多数数据运动，这是传统计算机中的关键瓶颈。但是，为了最好地利用内存计算，以在千兆字节到TERA字节级的规模上加速AI模型，具有高容量，能效和高性能存储技术以适合模型至关重要。 NAND内存是可擦除的可编程读取内存的一种形式，它是从not和（nand）逻辑门中获取其名称的。拟议的研究旨在开发铁电垂直NAND记忆以满足这些需求，同时训练学生为半导体行业开发未来的劳动力。垂直NAND内存通过垂直增加堆叠层的数量来提供最高的密度。但是，基于浮动门或电荷陷阱闪光的常规垂直内存的性能较差，包括高速度，低速和耐力较差，尽管容量很大。为了解决这些问题，这项研究提出了垂直NAND闪光替代方案的开发：垂直NAND铁电场效应晶体管（FEFET），该晶体管（FEFET）同时达到了高密度和高性能。通过利用最近发现的铁电HFO2，可以实现卓越的性能，因为铁电编程是由施加的电场驱动的，该电场可以是节能且快速的。 The project aims to design and evaluate vertical NAND FeFET-based compute-in-memory accelerators from devices to architectures, with innovations such as novel cell designs to achieve multi-level cell and variation suppression, vertical NAND array disturb mitigation with a novel array structure, and mapping and benchmarking of various important information processing tasks to the vertical NAND FeFET array.此外，这项研究包括为K-12学生和老师提供的劳动力培训活动，例如讲座和实践经验，以促进兴奋并吸引他们进入半导体行业的人才管道。拟议的研究将通过代表性不足的小组的研究经验（REU）计划招募研究生和本科生，该项目中获得的知识将通过课程开发和在线共享存储库来分配。该奖项反映了NSF的法定任务，并通过评估该智力效果来反映出基金会的智力效果和广泛的范围。